Logic Circuit Design

Size of today's logic systems

• Thousands to hundreds of thousands of logic gates
• Need computer assistance to deal with this

Computer Tools

• CAD--computer-aided design
  Within electronics this often refers to physical design tools:
  • IC-layout programs
  • PCB-layout programs
• CAE--computer-aided engineering
  Within electronics this means conceptual-design tools:
  • schematic editors
  • circuit simulators
  • PLD compilers
• CAD and CAE terms tend to be used interchangeably

Overall Design Process (flowchart)

1. Concept/sell idea to management
2. Modeling and design capture
3. Design optimization through use of design database
4. Determine test vectors
5. Do logic simulation
6. Results of simulation fail: return to modeling step; else go on
7. Implementation
8. Physical design
9. Testing physical system

Regarding modeling

Levels of model abstraction for digital logic circuits

Ways of describing the behavior

• Truth tables
• minterm or maxterm list(s)
• Logic equations
• HDL (hardware description language) such as
  • Espresso (Univ of Calif, Berkeley)
  • ABEL--advanced boolean equation language (for PLDs)
  • Verilog
  • VHDL--VHSIC (very high speed integrated circuit) hardware description language

Synthesis of a Logic Circuit (block diagram)

Starting with Behavioral Models

HDL Model

• Using an appropriate HDL translator and Function Library, generate logic equations

Truth Table or Equivalent

• Translate to logic equations

Minimize Logic Equations Applying Constraints:

• gate fan-in and/or fan-out
• types of gates available
• timing characteristics (affects number of levels)
• power consumption

Using Component Library, Map Design onto Logic Elements

Starting with Structural Models

Schematic Drawing

Work with CAE tool

1. Use Component Library and
2. Design Support to produce:

Complete Schematic of Design

Once Schematic is completed, use CAE to generate Netlist

From Circuit Netlist

• Extract logic equations
• Extract component placement information
• Feedback into design process/schematic

Logic Simulation (block diagram)

Component Models

Test Vectors

Logic Verification

Timing Verification

Schematic CAE Tools

Common Names:

• Schematic Capture
• Schematic Editor

Typical Fields Supported by Schematic CAE Programs:

1. Component type: gives predrawn symbol from component library
   e.g., some of the libraries in PSpice are:
   1. eval.slb for digital components
   2. analog.slb for analog components like resistors
   3. port.slb for various ports including ground
   4. source.slb for various sources
2. Component value: mostly relevant for analog components; e.g., resistors to specify resistance value, power rating, and tolerance
3. Approved part number: one must work from your company's approved parts list. This will be some sort of company part designation.
4. Reference designator: alphanumeric label to distinguish among multiple instances of similar parts
   PSpice uses U1A type notation, which stands for Unit 1 Section A
5. Pin numbers: Specify assignment of signal pins on each component. Pin information usually comes in component library. May need to do this via back annotation after PCB layout is done, given that you usually have multiple gates in a unit and multiple uses of a particular component
6. Wire type: types like ordinary, bus, extra-wide
7. Signal name: as provided by designer to aid in describing the behavior
8. Connection flag: indicates connection of one signal line to another one on same or different page of schematic

Products from Schematic programs

• Printed copy of schematic
• Parts list: list of components and their reference designators
• Net list: A net is a set of pins that are all connected to the same electrical node or signal. A net list specifies all such connections that are required by the schematic, typically using an alphabetically sorted list of signal names. For each signal name, it lists the device pins (identified by reference designator and pin number) where that signal appears.
• Check for design rule errors:
  • dangling (unconnected) gate inputs
  • multiple gates driving a single line
  • one gate output driving too many gate inputs
  • unnamed nets
  • missing, improper, or inconsistent circuit parameters
  Note: no check for logical correctness