Introduction to a Logic Analyzer
Pre-Lab: 4 pts
Use PSpice to prepare your schematics for your 8-bit counter circuit
and for the glitch circuit. In PSpice simulate the operation of
the glitch circuit using appropriate inputs; print out a copy
of the results showing the waveforms of both the inputs and the
output. All these items will be collected at the start of the
lab. Make a copy for your own use during the lab.
In-Lab: 18 pts
- Analyzer Familiarization. Review the keys, screens,
and menus associated with the Logic Analyzer (as described in
the User Info document)
by doing the following:
- Power up the HP system after making sure that the operating
system disk is in the disk drive. This lab will use the logic
analyzer function only, so on the System Configuration Menu the
DSO must be set to OFF.
- Put one of the analyzers in "State" operation by
selecting the STATE mode on that analyzer.
- Go to the State Format Specification screen by pressing the
<FORMAT/CHAN > key on the "menu" area of
the keypad. Review the various choices available here.
- Then go to the State Trace Specification screen by pressing
the <TRACE/TRIG > key on the "menu" area
of the keypad. Review the series of events that can be used to
trigger the analyzer and cause it to start storing data.
- Next go to the State Listing Menu by pressing the
<DISPLAY
> key in the menu area of the keypad. Try the various display
forms. Also look at each of the four modes: State Listing, State
Waveforms, State Chart, and State Compare. Although State Chart
and State Compare will not be used in this lab, they are very
useful modes.
- Put one of the analyzers in "Timing" operation by
selecting the TIMING mode on that analyzer from
the System Configuration Menu.
- Go to the Timing Format Specification screen by pressing the
<FORMAT/CHAN > key on the "menu" area of
the keypad. Note the similarities and differences from the State
Format Specification screen.
- Then go to the Timing Trace Specification screen by pressing
the <TRACE/TRIG > key on the "menu" area
of the keypad. Review the parameters that can be used to trigger
the analyzer and to control its behavior after triggering.
- Finally, go to the Timing Waveforms Menu by pressing
the <DISPLAY > key in the menu area of the keypad.
Review the options available under each of the control fields
on this screen.
- State Measurements of a Sequential Circuit.
Construct an 8-bit counter circuit using two 7493s.
Connect the clock input of the circuit to the CADET
function generator TTL output set at 1k Hz.
Connect probes 0-3 of pod 2 to the most significant
bits of the 8-bit counter; then connect probes 0-3
of pod 1 to the least significant bits of the counter.
Connect the clock input of pod 1 to the clock input
of the circuit. Note that all instructions are
given assuming that the default system settings are
intact (i.e. the HP machine has just been rebooted).
From the system configuration menu, assign pods 1 and 2
to Analyzer 1. Change the field in the analyzer 1 box to
STATE. Be sure that the DSO is set to
OFF.
Go to the State Format Specification menu (press
<FORMAT/CHAN > key), and modify the first label
so that it has an appropriate name and change its bit
fields so that it represents all 8 bits of the counter.
Now modify the next label so that it represents the
lower nibble (4 bits) of the 8 bit counter. Modify the
next two labels so that they represent the odd bits and
even bits of the 8 bit counter. Be sure that the
Clock Period is set to
>60ns, the pod Clock
field is set to Normal under each of
the pods, and that the Clock field is
set to J.
Go to the Specify Symbols menu (move cursor to the
SPECIFY SYMBOLS field and press
<select >). Assign the following symbols to the
label that represents all eight bits of the counter
(assume that the least significant bit is subscripted 0):
| 00 | "All Low" |
| FF | "All High" |
| Range 01 to 50 | "1 to 80" |
| AA | "Even bits High" |
| 55 | "Odd bits High" |
| F0 | "Hi nibble on" |
| 0F | "Low nibble on" |
Go to the State Listing menu (press the <DISPLAY > key)
and then press <RUN >. Display the data in all the available
bases by changing the base field beneath each label. Practice
scrolling through the data and the labels using the up/down and
left/right arrows along with the cursor knob. Display the data
under the 8-bit label in the SYMBOL mode and answer
the following questions:
- What is the value of the label representing the even bits
when the "Even bits high" label is shown under the 8-bit
label?
- When "Odd bits High" label is shown?
- What is the value of the label representing the lower nibble
when the "Hi nibble on" is shown?
- When the "Low nibble on" is shown?
- Go the State Trace Specifications menu
(press <TRACE/TRIG
> key) and set the COUNT field
to TIME.
Go to the Listing menu and press <RUN > again.
The time tag represents the time between stored states.
Time Between States =
- What is the relationship between this time and the clock
frequency?
- Slow the clock rate down to 100Hz. Press <RUN > again,
while quickly varying the clock rate repeatedly using the slider
on the cadet. Note the changes in the time tags.
- Turn all the labels off except for the one representing the
8 bits of the counter (State Format Specifications menu). Go to
the State Trace Specifications menu (press <TRACE/TRIG
> key). Modify the sequence levels so that 256 states are
captured,
starting with 0. Then turn the COUNT field to
STATE.
Go to the display menu and press <RUN > to
test the sequence. Note the count tag next to each stored state.
This represents the number of states detected between stored states.
Describe the sequence used, including the values of the qualifier
fields used.
- Modify the sequence levels so that only the odd numbers from
0 to 127, and only the even numbers from 128 to 255 are stored,
starting from 0 (hint: specify the qualifier field values in binary
and use some "don't care" terms in the qualifier field
values). Show the list to the lab instructor and have him initial
this step.
- Modify the sequence levels so that only numbers that are
divisible
by 16 are stored. What is the value of the count tag?
- Change the sequence levels back to the default setting (i.e.
store all states), and obtain a new set of data (press <RUN
>). From the display menu, place the cursor on the STATE
LISTING field, press <select > and change
it to STATE WAVEFORMS. Insert 8 waveforms corresponding
to the 8 individual bits of the label representing all 8 bits
of the counter circuit. Set the markers function to place one
of the markers on a point where all 8 bits are high. Show this
to the lab instructor and have him initial this step.
- How would you scroll through the waveforms without using the
markers function?
- Glitch Detection. Construct the following circuit using
a 7400 Quad-NAND TTL. (Note that advanced TTL or Schottky TTL
cannot be used). Connect the "A" input to +5v via
an appropriate resistor (indicating it is always "1"),
connect "B" to the CADET function generator TTL output
set to 100Hz. Connect probe 2 of pod 3 to the output of the circuit
("F"), and probe 1 of pod 3 to the "B" input.
Go to the System Configuration Menu. Turn analyzer 1 to
OFF,
and turn analyzer 2 to TIMING. Assign pod 3
to analyzer 2. Go to the Timing Format Specification menu
(press <FORMAT/CHAN
>) and create a label representing the two bits on the input
pod. Go to the Timing Waveforms Menu
(press <DISPLAY >).
Insert 2 waveforms corresponding to the two input signals. Press
<RUN >. Note the glitches in the output waveform.
Change the Time/DIV field so that the glitch can
be more clearly seen. Use the markers function to measure the
length of a glitch. Show these glitches to the lab instructor
and have him initial this step.
- Length of glitch =
- When would a glitch like this be a problem?
- How accurate is the value obtained for the glitch length,
and why?
- Propagation Delay. Construct the same circuit you used
in the last lab to measure propagation delay (five cascaded inverters).
Connect the input to the CADET function generator TTL output set
to 100Hz. Connect probe 1 of pod 4 to the circuit input, and probe
2 of pod 4 to the circuit output.
Go to the System Configuration menu, and assign pod 4 to analyzer
2, and unassign any other pods assigned to it. Set analyzer 2
to TIMING. Go to the Timing Format Specification
menu, and insert a label representing the 2 signals. Go to the
Timing Waveforms menu, and insert two waveforms corresponding
to the two bits of the label. Press <RUN >. Change
the Time/DIV field so that the propagation delay
of the circuit can be clearly seen, and use the markers function
to measure the propagation delay.
- Time/DIV Value used =
- Propagation Delay (per gate) =
- How does this value compare to the values obtained in
Lab 8?
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