| Period | Topics |
|---|---|
| Jan. 9 | Review of EE 270 Material |
| Jan. 11 | Digital Electronics Basics |
| Jan. 16 | Additional Digital |
| Electronics Information | |
| Jan. 18 | Storm Day |
| Jan. 23 | Logic Circuit Design |
| Jan. 25 | Synthesis of a Logic Circuit |
| Jan. 30 | Schematic Capture with PSpice |
| Feb. 1 | Logic Circuit Simulation with PSpice |
| Feb. 6 | Shift Registers |
| Feb. 8 | Example Counters |
| Feb. 13 | Simplifying Boolean Expressions |
| Feb. 15 | More on Minimization Methods |
| Feb. 20 | Adding New Devices to
Schematic
Capture Tool Using the Symbol Editor |
| Feb. 22 | EXAM #1 |
| Feb. 27 | Adders |
| Feb. 29 | Memory |
| Mar. 12 | PROMs |
| Mar. 14 | Other PLDs |
| Mar. 19 | Work Day |
| Mar. 21 | PALs |
| Mar. 26 | Design issues with
PALs and PLAs |
| Mar. 28 | FPGAs |
| Apr. 2 | FPGAs |
| Apr. 4 | PALASM2 |
| Apr. 9 | Intro to VHDL |
| Apr. 11 | VHDL Details |
| Apr. 16 | EXAM #2 |
| Apr. 18 | VHDL Examples |
| Apr. 23 | VHDL Examples |
| Apr. 25 | Cancelled |
| Apr. 30 | Term Project Reports |
| Makeup Day May 2 |
Term Project Reports |
| May 8 | FINAL EXAM |
** A typical test schedule is shown.
Your instructor will announce the exact test dates.